Bipolar CMOS DMOS (BCD) process technology is a technology which allows the incorporation of analog components (Bipolar, CMOS, DMOS), digital components (CMOS) and lateral transistors (DMOS) onto the same die.
A primary driver of BCD process technology growth has been the recent rise of smartphones and tablets. These devices comprise multiple functions which all compete for power, such as the application processor, baseband processor, the large displays, etc. Such a device thus typically uses one or more Power Management Integrated Circuit (PMIC) chips to manage the power with minimal losses to ensure long battery life. An evolving application highly suitable for BCD process technology is motor-control, which is used in Hard Disk Drives (HDDs) to turn the spindles for example. High-density BCD process technology can be used along with a modern 32-bit microcontroller to implement sophisticated motor-control System-on-Chips (SoCs) that can implement advanced algorithms to help motors deliver the same or greater output whilst consuming less power. The range of fabrication processes required to integrate bipolar, CMOS and DMOS functionality imposes tight constraints on the processes used, and in particular the so-called thermal budgets (the times for which the device can be exposed to high temperature for, for example, growing thermal oxides), are relatively low. Moreover, as the minimum-feature-size requirements of processing technology continues to shrink, for instance by the increased use of so-called advanced nodes, or deep sub-micron process technology, there is an increased requirement for highly planar surfaces, that is to say with little or no surface topography, in order to meet the requirement of lithography in the deep sub-micron range.
In a separate branch of semiconductor process technology, technologies have been developed to significantly increase the breakdown voltage of semiconductor devices, such that nowadays it is possible to manufacture devices having breakdown voltages above 500V and typically up to or over on about 700V. Such technologies, often referred to as high voltage process technologies, typically involve designing lateral devices having a widely spaced apart terminals, with laterally extended drift regions designed to have reduced surface field effect (RESURF) underneath high-quality LOCOS oxide, and generally require large thermal budgets, for instance to produce relatively thick—typically up to a micron or more—LOCOS layers.
BCD processing is generally considered challenging to combine with high-voltage processing, and advanced BCD processing in particular may be considered to be incompatible with high vaulted processing, due to the conflicting thermal budget and planarity requirements.